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SuperTinyKernel™ RTOS 1.08.x
Lightweight, high-performance, deterministic, bare-metal C++ RTOS for resource-constrained embedded systems. MIT Open Source License.
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ARMv7-M/ARMv8-M system fault exception context state capture. More...
#include <stk_arch_arm-cortex-m.h>
Classes | |
| struct | Mpu |
| Hardware Memory Protection Unit (MPU) status register snapshot. More... | |
Public Member Functions | |
| void | Fill (const Word *stacked_regs, Word exc_return) |
| Populate fault context registers and hardware MPU state from an exception stack frame. | |
Public Attributes | |
| hw::ExceptionFrame | frame |
| Saved hardware exception stack frame. | |
| Word | CFSR |
| Configurable Fault Status Register (CFSR: MemManage, BusFault, UsageFault). | |
| Word | HFSR |
| HardFault Status Register (HFSR). | |
| Word | MMFAR |
| Memory Management Fault Address Register (MMFAR). | |
| Word | BFAR |
| BusFault Address Register (BFAR). | |
| Word | AFSR |
| Auxiliary Fault Status Register (AFSR). | |
| Word | CONTROL |
| Core CONTROL register state snapshot. | |
| Word | EXC_RETURN |
| Exception return magic value (EXC_RETURN). | |
| bool | mmfar_valid |
| Flag indicating validity of MMFAR address value (derived from CFSR.MMARVALID). | |
| bool | bfar_valid |
| Flag indicating validity of BFAR address value (derived from CFSR.BFARVALID). | |
ARMv7-M/ARMv8-M system fault exception context state capture.
Preserves exception stack frames, core system control fault status registers (CFSR, HFSR, MMFAR, BFAR, AFSR), execution context status (CONTROL, EXC_RETURN), and hardware Memory Protection Unit (MPU) state snapshots at the time of fault occurrence for post-mortem diagnostics.
Definition at line 484 of file stk_arch_arm-cortex-m.h.
Populate fault context registers and hardware MPU state from an exception stack frame.
| [in] | stacked_regs | Pointer to the hardware-stacked exception register frame. |
| [in] | exc_return | EXC_RETURN execution state value captured at fault entry. |
| Word stk::FaultContext::AFSR |
Auxiliary Fault Status Register (AFSR).
Definition at line 514 of file stk_arch_arm-cortex-m.h.
| Word stk::FaultContext::BFAR |
BusFault Address Register (BFAR).
Definition at line 513 of file stk_arch_arm-cortex-m.h.
| bool stk::FaultContext::bfar_valid |
Flag indicating validity of BFAR address value (derived from CFSR.BFARVALID).
Definition at line 524 of file stk_arch_arm-cortex-m.h.
| Word stk::FaultContext::CFSR |
Configurable Fault Status Register (CFSR: MemManage, BusFault, UsageFault).
Definition at line 510 of file stk_arch_arm-cortex-m.h.
| Word stk::FaultContext::CONTROL |
Core CONTROL register state snapshot.
Definition at line 515 of file stk_arch_arm-cortex-m.h.
| Word stk::FaultContext::EXC_RETURN |
Exception return magic value (EXC_RETURN).
Definition at line 516 of file stk_arch_arm-cortex-m.h.
| hw::ExceptionFrame stk::FaultContext::frame |
Saved hardware exception stack frame.
Definition at line 509 of file stk_arch_arm-cortex-m.h.
| Word stk::FaultContext::HFSR |
HardFault Status Register (HFSR).
Definition at line 511 of file stk_arch_arm-cortex-m.h.
| Word stk::FaultContext::MMFAR |
Memory Management Fault Address Register (MMFAR).
Definition at line 512 of file stk_arch_arm-cortex-m.h.
| bool stk::FaultContext::mmfar_valid |
Flag indicating validity of MMFAR address value (derived from CFSR.MMARVALID).
Definition at line 523 of file stk_arch_arm-cortex-m.h.